Sugiura Keisuke

Affiliation
Institute of Systems and Information Engineering
Official title
Assistant Professor
ORCID
0000-0001-8534-2381
Sex
Male
Birth date
1998-02
URL
Email
5>@24@=,N]Y747,W.>W?>@6@-,W,.W5;
Office
Laboratory of High-Performance Computing System (FPGA expert team), University of Tsukuba
Research fields
Computer system
Research keywords
Edge AI
Edge Computing
Domain-Specific Accelerators
Reconfigurable Computing Systems (FPGA)
Research projects
小型移動ロボット向け深層学習ベースSLAM技術の開発とそのハードウェア化2023-03 -- 2025-03Keisuke SugiuraJapan Society of for the Promotion of Science/Grant-in-Aid for JSPS Fellows2,500,000Yen
Career history
2025-04 -- (current)University of TsukubaInstitute of Systems and Information EngineeringAssistant Professor
2024-10 -- 2025-03JSPSResearch Fellowship for Young Scientist (PD)
2022-04 -- 2024-09JSPSResearch Fellowship for Young Scientist (DC1)
Academic background
2022-04 -- 2024-09Keio University Graduate School of Science and Technology School of Science for Open and Environmental Systems (Ph.D. Program)
2020-04 -- 2022-03Keio University Graduate School of Science and Technology School of Science for Open and Environmental Systems (Master's Program)
2016-04 -- 2020-03Keio University Faculty of Science and Technology Department of Information and Computer Science
Degree
2020-03Bachelor of EngineeringKeio University
2022-03Master of Science in EngineeringKeio University
2024-09Ph.D. in EngineeringKeio University
Academic societies
2023-05 -- (current)Information Processing Society of Japan
Honors & Awards
2023-05-22情報処理学会 コンピュータサイエンス領域奨励賞
2022-08-12電子情報通信学会 リコンフィギャラブルシステム研究会 若手講演賞
2021-04-22Cross-disciplinary Workshop on Computing Systems, Infrastructures, and Programming (xSIG) Outstanding Master’s Student Award
2021-04-16IEEE Symposium on Low-Power and High-Speed Chips and Systems (COOL Chips) Featured Poster Award
2020-02-16情報処理学会 システム・アーキテクチャ研究会 若手奨励賞
Articles
  • Performance and Power-Efficiency Improvements on Graph Embedding using Sequential Training Algorithm and FPGA
    Sunaga Kazuki; Sugiura Keisuke; Matsutani Hiroki
    IEICE Transactions on Information and Systems D, 2025
  • FPGA-Accelerated Correspondence-free Point Cloud Registration with PointNet Features
    Sugiura Keisuke; Matsutani Hiroki
    ACM Transactions on Reconfigurable Technology and Systems, 2025
  • A Cost-Efficient FPGA-Based CNN-Transformer using Neural ODE
    Okubo Ikumi; Sugiura Keisuke; Matsutani Hiroki
    IEEE Access/12/pp.155773-155788, 2024-10
  • An Integrated FPGA Accelerator for Deep Learning-based 2D/3D Path Planning
    Sugiura Keisuke; Matsutani Hiroki
    IEEE Transactions on Computers/73(6)/pp.1442-1456, 2024-06
  • A Low-Cost Neural ODE with Depthwise Separable Convolution for Edge Domain Adaptation on FPGAs
    Kawakami Hiroki; Watanabe Hirohisa; Sugiura Keisuke; M...
    IEICE Transactions on Information and Systems D/E106-D(7)/pp.1186-1197, 2023-07
  • A Universal LiDAR SLAM Accelerator System on Low-cost FPGA
    Sugiura Keisuke; Matsutani Hiroki
    IEEE Access/10/pp.26931-26947, 2022-03
  • An FPGA Acceleration and Optimization Techniques for 2D LiDAR SLAM Algorithm
    Sugiura Keisuke; Matsutani Hiroki
    IEICE Transactions on Information and Systems D/E104-D(6)/pp.789-800, 2021-06
  • A Scalable Secure Fault Tolerant Aggregation for P2P Federated Learning
    Yahata Yujiro; Sugiura Keisuke; Matsutani Hiroki
    Advances in Parallel and Distributed Computational Models (APDCM)/pp.222-231, 2024-05
  • An FPGA-Based Accelerator for Graph Embedding using Sequential Training Algorithm
    Sunaga Kazuki; Sugiura Keisuke; Matsutani Hiroki
    Reconfigurable Architectures Workshop (RAW)/pp.148-154, 2024-05
  • An Edge-Server Partitioning Method for 3D LiDAR SLAM on FPGAs
    Yasuda Mizuki; Sugiura Keisuke; Kojima Ryuto; Matsutan...
    Reconfigurable Architectures Workshop (RAW)/pp.113-120, 2023-05
  • A Lightweight Transformer Model using Neural ODE for FPGAs
    Okubo Ikumi; Sugiura Keisuke; Kawakami Hiroki; Matsuta...
    Reconfigurable Architectures Workshop (RAW)/pp.105-112, 2023-05
  • An Efficient Accelerator for Deep Learning-based Point Cloud Registration on FPGAs
    Sugiura Keisuke; Matsutani Hiroki
    Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP)/pp.68-75, 2023-03
  • P3Net: PointNet-based Path Planning on FPGA
    Sugiura Keisuke; Matsutani Hiroki
    IEEE International Conference on Field Programmable Technology (ICFPT)/pp.1-9, 2022-12
  • dsODENet: Neural ODE and Depthwise Separable Convolution for Domain Adaptation on FPGAs
    Kawakami Hiroki; Watanabe Hirohisa; Sugiura Keisuke; M...
    Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP)/pp.152-156, 2022-03
  • A Unified Accelerator Design for LiDAR SLAM Algorithms for Low-end FPGAs
    Sugiura Keisuke; Matsutani Hiroki
    IEEE International Conference on Field Programmable Technology (ICFPT)/pp.1-9, 2021-12
  • Neural ODEを用いたFPGA向け低コスト点群深層学習
    安田 瑞生; 杉浦 圭祐; 松谷 宏紀
    電子情報通信学会技術研究報告 (信学技報)/124(250)/pp.159-164, 2024-11
  • Pynqと高位合成による点群処理アプリケーションの設計と実装
    杉浦 圭祐
    電子情報通信学会技術研究報告 (信学技報)/124(74)/pp.70-72, 2024-06
  • 逐次学習可能なグラフ分散表現のFPGAアクセラレータ
    須永 一輝; 杉浦 圭祐; 松谷 宏紀
    電子情報通信学会技術研究報告 (信学技報)/123(293)/pp.48-53, 2023-12
  • FPGAを用いた軽量な点群深層学習モデルの実装
    杉浦 圭祐; 松谷 宏紀
    電子情報通信学会技術研究報告 (信学技報)/123(191)/pp.58-63, 2023-09
  • Peer-to-Peer連合学習における難読化モデル交換の通信量削減
    八幡 悠二郎; 杉浦 圭祐; 松谷 宏紀
    電子情報通信学会技術研究報告 (信学技報)/123(145)/pp.13-18, 2023-08
  • 強化学習を用いた3D LiDAR SLAM向け入力点群削減手法
    小島 瑠斗; 杉浦 圭祐; 松谷 宏紀
    電子情報通信学会技術研究報告 (信学技報)/122(451)/pp.77-82, 2023-03
  • 点群特徴抽出のFPGAによる高速化
    杉浦 圭祐; 小島 瑠斗; 松谷 宏紀
    電子情報通信学会技術研究報告 (信学技報)/122(451)/pp.60-65, 2023-03
  • エッジ-サーバ協調型LiDAR SLAMのFPGAへのオフロード手法
    安田 瑞生; 小島 瑠斗; 杉浦 圭祐; 松谷 宏紀
    電子情報通信学会技術研究報告 (信学技報)/122(328)/pp.7-12, 2023-01
  • Neural ODEを用いたFPGA向け高効率マルチヘッド自己注意機構
    大久保 郁海; 杉浦 圭祐; 松谷 宏紀
    電子情報通信学会技術研究報告 (信学技報)/122(328)/pp.1-6, 2023-01
  • FPGAを用いた点群データ向け特徴量ヒストグラムの並列処理
    小島 瑠斗; 杉浦 圭祐; 松谷 宏紀
    電子情報通信学会技術研究報告 (信学技報)/122(60)/pp.101-106, 2022-06
  • more...
Books
  • Chapter 17: Efficient Neural Networks and Their Acceleration Techniques for Embedded Machine Learning
    Matsutani Hiroki; Sugiura Keisuke
    Embedded Machine Learning for Cyber-Physical, IoT, and Edge Computing: Software Optimizations and Hardware/Software Codesign/pp.429-452, 2023-10
Conference, etc.
  • A Lightweight On-device CNN Fine-tuning using Skip2-LoRA and Quantized Cache
    Matsutani Hiroki; Sugiura Keisuke; Kondo Masaaki; Marc...
    Asia and South Pacific Design Automation Conference (ASP-DAC)/2025-01-20
  • Evaluation of Neural Network Based Scan Matching for SLAM SoC Implementations
    Sugiura Keisuke; Matsutani Hiroki
    IEEE Symposium on Low-Power and High-Speed Chips and Systems (COOL Chips)/2021-04-14
Teaching
2025-04 -- (current)論理回路筑波大学
Professional activities
2025-04 -- (current)International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART 2025) Organizing CommitteePublicity Chair

(Last updated: 2025-04-11)