Sannomiya Shuji

Researcher's full information

Articles
  • Highly-Dependable and Long-Lifetime Data-Driven Networking Processor with Energy Assurance Capability
    Shuji Sannomiya; Nishikawa Hiroaki
    Proceedings of the 2015 International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA’15)/pp.557-563, 2015-07
  • Data-Driven Sensor Networking System Simulator
    Kazuhiro Aoki; Shuji Sannomiya; Nishikawa Hiroaki
    Proceedings of the 2015 International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA’15)/pp.564-570, 2015-07
  • Energy Efficient Data-Driven Networking Processor with Autonomous Load Distribution Capability
    Shuji Sannomiya; Nishikawa Hiroaki
    Proceedings of the 2014 International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA’14)/pp.514-520, 2014-07
  • A Prototype of Ultra-Low-Power Data-Driven Networking Platform
    三宮秀次; 青木一浩; 宮城桂; 岩田誠; 西川博昭
    The IEICE transactions on information and systems (Japanese edition)/96(10)/pp.2319-2326, 2013-10
  • 自己同期型エラスティックパイプラインによる高機能連想機構
    西川博昭; 三宮秀次
    STARCワークショップ2013講演予稿集/pp.76-77, 2013-09
  • A Study on Low-Powered Self-Timed Pipeline Circuit
    岩田誠; 宮城桂; 三宮秀次; 西川博昭
    高知工科大学紀要/Vol.10(1)/pp.95-102, 2013-07
  • An Overload-Free Data-Driven Ultra-Low-Power Networking Platform Architecture
    Shuji Sannomiya; Yukikuni Nishida; Makoto Iwata; Hiroaki Nis...
    Proceedings of the 2013 International Conference on Parallel and Distributed Processing Techniques and Applications(PDPTA’13)/pp.604-610, 2013-07
  • An Implementation of Platform Simulator for Congestion-Free Ultra-Low-Power Data-Driven Networking System
    Kazuhiro Aoki; Shuji Sannomiya; Makoto Iwata; Hiroshi Ishii; ...
    Proceedings of the 2013 International Conference on Parallel and Distributed Processing Techniques and Applications(PDPTA’13)/pp.611-617, 2013-07
  • Low-Powered Self-Timed Pipeline with Variable-Grain Power Gating and Suspend-Free Voltage Scaling
    Kei Miyagi; Shuji Sannomiya; Makoto Iwata; Hiroaki Nishikawa
    Proceedings of the 2013 International Conference on Parallel and Distributed Processing Techniques and Applications(PDPTA’13)/pp.618-624, 2013-07
  • Ultra-Low-Power Data-Driven Networking System and Its Evaluation
    西川博昭; 青木一浩; 三宮 秀次; 宮城桂; 岩田誠; 宇津圭祐; 石井啓之
    The transactions of the Institute of Electronics, Information and Communication Engineers. B/96(6)/pp.572-579, 2013-06
  • LSI Implementation of Ultra-low-power Data-driven Networking Processor ULP-CUE and Its Evaluation
    三宮秀次; 青木一浩; 宮城桂; 岩田誠; 西川博昭
    情報処理学会論文誌. コンピューティングシステム/6(1)/pp.78-86, 2013-01
  • Power-Performance Verification of Ultra-Low-Power Data-Driven Networking Processor: ULP-CUE
    Shuji Sannomiya; Kazuhiro Aoki; Makoto Iwata; Hiroaki Ni...
    Proceedings of the 2012 International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA2012)/pp.465-471, 2012-07
  • Low-Powered Self-Timed Pipeline with Runtime Fine-Grain Power Supply
    Kei Miyagi; Shuji Sannomiya; Makoto Iwata; and Hiroaki Nishi...
    Proceedings of the 2012 International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA2012)/pp.472-478, 2012-07
  • Chip Multiprocessor Platform for Ultra-Low-Power Data-Driven Networking System: ULP-DDNS
    Shuji Sannomiya; Ryotaro Kuroda; Kazuhiro Aoki; Kei Miyagi; M...
    Proceedings of the 2011 International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA2011)/pp.428-434, 2011-07
  • Self-Timed Power-Aware Pipeline Chip and Its Evaluation
    Kei MIYAGI; Shuji SANNOMIYA; Makoto IWATA; and Hiroaki NISHI...
    Proceedings of the 2011 International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA2011)/pp.442-448, 2011-07
  • Multi-Grain Power Control Scheme in Ultra-Low-Power Data-Driven Chip multiprocessor: ULP-DDCMP
    Yukikuni Nishida; Shuji Sannomiya; Hiroaki Nishikawa
    Proceedings of the 2011 International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA2011)/pp.435-441, 2011-07
  • Stage-by-Stage Power Gating Circuit for Ultra-Low-Power Self-Timed Pipeline
    Shuji Sannomiya; Kei Miyagi; Makoto Iwata; Hiroaki Nishi...
    Proceedings of the 2010 International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA2010)/pp.596-602, 2010-07
  • Macroscopic Power Simulation for Self-Timed Pipeline
    Naoya Kagawa; Shuji Sannomiya; and Makoto Iwata
    Proceedings of International Conference on Parallel and Distributed Processing Techniques and Applications/p.589-595, 2010-07
  • Self-Timed Power Gating for Ultra-Low-Power Pipeline Circuit
    Shuji SANNOMIYA; Kei MIYAGI; Keiichi SAKAI; Makoto IWATA...
    Proceedings of the 2009 International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA2009)/pp.575-580, 2009-07
  • 自己タイミング型パイプラインシステムの性能見積りモデル
    三宮 秀次; 大森 洋一; 酒居 敬一; 岩田 誠
    電子情報通信学会論文誌A/J92-A(7)/p.477-486, 2009-07
  • Interacting Self-Timed Pipelines and Elementary Coupling Control Modules
    Kazuhiro Komatsu; Shuji Sannomiya; Makoto Iwata; Hiroaki ...
    IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences/E92-A(7)/pp.1642-1651, 2009-07
  • An Application of ULP-DDNS: Smart Pervasive Daily Healthcare System
    Makoto Iwata; Yuki Tamura; Masaaki Hashida; Shuji Sannomiya
    Proceedings of International Conference on Parallel and Distributed Processing Techniques and Applications/p.622-627, 2009-07
  • Self-Timed Stream Processor for Surrounding Computing Environment
    Makoto Iwata; Hiroshi Shima; Shuji Sannomiya; Hiroaki Nishikawa
    Proceedings of the 2007 International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA2007)/pp.655-660, 2007-06