NISHIKAWA Hiroaki
- Articles
- A 100 Mega-Access per Second Matching Memory for a Data-Driven Microprocessor
Hidehiro Takata; Shinji Komori; Toshiyuki Tamura; Fumiyas...
IEEE Journal of Solid-State Circuits/25(1)/pp.95-99, 1990-02 - A 40-MFLOPS 32-bit Floating-Point Processor with Elastic Pipeline Scheme
Shinji Komori; Hidehiro Takata; Toshiyuki Tamura; Fumiyas...
IEEE Journal of Solid-State Circuits/24(5)/pp.1341-1347, 1989-10 - A 100 Mega-Access Matching Memory for a Data-Driven Microprocessor
Hidehiro Takata; Shinji Komori; Toshiyuki Tamura; Fumiyas...
Proceedings of VLSI Circuits Symposium, IEEE/pp.123-124, 1989-05 - Visual Programming Environment
西川 博昭; 寺田 浩詔
IPSJ Magazine/30(4)/pp.354-362, 1989-04 - A Study on Relative Address Architechture for Data-Driven Processors.
坪田 浩乃; 小守 伸史; 高田 英裕; 田村 俊之; 浅井 文康; 徳田 健; 山崎 哲男; 嶋 憲司; 西川 ...
全国大会講演論文集/38(3)/pp.1410-1411, 1989-03 - A 40MFLOPS 32-bit Floating-Point Processor
Shinji Komori; Hidehiro Takata; Toshiyuki Tamura; Fumiyas...
Proceedings of IEEE International Solid State Circuits Conference/pp.46-47, 286, 1989-02 - A VLSI-Oriented Data-Driven Processor:Q-x
寺田浩詔; 西川博昭; 岩田誠; 岡本俊弥; 宮田宗一; 小守伸史; 嶋憲司
The Institute of Electronics, Information and Communication Engineers Transactions on Information and Systems (Japanese Edition)/J71-D(8)/pp.1383-1390, 1988-08 - Evaluation of a Circular-Pipelined Data-Driven Processor Using Narkov Process Model
小守伸史; 高田英裕; 田村俊之; 浅井文康; 山崎哲男; 嶋憲司; 西川博昭; 浅田勝彦; 寺田浩詔
The Institute of Electronics, Information and Communication Engineers Transactions on Information and Systems (Japanese Edition)/J-71-D(8)/pp.1553-1559, 1988-08 - VLSI Design of a One-Chip Data-Driven Processor: Q-v1
Hiroaki Terada; Hiroaki Nishikawa; Katsuhiko Asada; Satos...
Proceedings of Fall Joint Computer Conference, IEEE/pp.594-601, 1987-10 - Architecture of a One-Chip Data-Driven Processor : Q-p
Hiroaki Nishikawa; Hiroaki Terada; Kohji Komatsu; Shin-ic...
Proceedings of the 16th International Conference on Parallel Processing/pp.319-326, 1987-08 - Design Philosophy of a Data-Driven Processor : Q-p
Hiroaki Terada; Hiroaki Nishikawa; Katsuhiko Asada; Toshi...
Journal of Information Processing/10(4)/pp.245-251, 1987-03 - A Design Concept for the Ultra High-Level Diagrammatical-Language Processing System
西川 博昭; 浅田 勝彦; 寺田 浩詔
全国大会講演論文集/33(1)/pp.647-648, 1986-10 - A Multi-Processing Module Organization for the Ultra High-level Diagrammatical-Language Processing System
松下 司; 西川 博昭; 浅田 勝彦; 寺田 浩詔
全国大会講演論文集/33(1)/pp.655-656, 1986-10 - A Unit Processing-Modu1e Architecture in the Ultra High-level Diagrammatical-Language Processing System
岩田 誠; 西川 博昭; 浅田 勝彦; 寺田 浩詔
全国大会講演論文集/33(1)/pp.653-654, 1986-10 - An Implementation of Transformation Mechanism in the Ultra High-Level Diagrammatical-Language Processing System
柳 純一郎; 西川 博昭; 浅田 勝彦; 寺田 浩詔
全国大会講演論文集/33(1)/pp.651-652, 1986-10 - A User Interface for the Ultra High-Level Diagrammatical-Language Processing System
金倉 広志; 西川 博昭; 浅田 勝彦; 寺田 浩詔
全国大会講演論文集/33(1)/pp.649-650, 1986-10 - A Data-Driven Execution Control Scheme and Its Experimental Study
西川 博昭; 浅田 勝彦; 寺田 浩詔
The Transactions of the Institute of Electronics and Communication Engineers of Japan/67(5)/pp.607-614, 1984-05 - A Data-Driven Schema Incorporating History Sensitivity
西川 博昭; 寺田 浩詔; 浅田 勝彦
The Transactions of the Institute of Electronics and Communication Engineers of Japan/66(10)/pp.1169-1176, 1983-10 - A Decentralized Controlled Multi-Processor System Based on the Data-Driven Scheme
Hiroaki Nishikawa; Katsuhiko Asada; Hiroaki Terada
Proceedings of the 3rd International Conference on Distributed Computing Systems, IEEE/pp.639-644, 1982-10
- A 100 Mega-Access per Second Matching Memory for a Data-Driven Microprocessor